217739 - ASIC/FPGA Verification Engineer
- Industry
- ENG
- Region
- CA-Bay Area
- City
- Mountain View
- State
- CA
- Rate
- Up to $90.65 DOE
- Duration
- 12 Months
- Description
Chipton-Ross is seeking 2 ASIC/FPGA Verification Engineers for a contract opportunity in Mountain View, CA, El Segundo, CA or Mesa, AZ.
BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE):
- Bachelor’s degree in EE, CE, CS, or related field (or equivalent experience).
- Experience with ASIC/FPGA verification using SystemVerilog and UVM.
- Ability to build self-checking testbenches and use object-oriented SV features.
- Familiarity with functional coverage and code coverage closure.
- Comfortable in Linux and using scripting tools.
- Regular and predictable attendance is required
POSITION RESPONSIBILITIES:
- Write SystemVerilog/UVM testbenches to verify ASICs and FPGAs.
- Develop self-checking, reusable UVM components: drivers, monitors, scoreboards, sequencers.
- Build functional coverage models and close code coverage gaps.
- Create tests that verify DSP and third-party IP integration.
- Run simulations, linting, CDC checks, static timing checks, and gate-level regressions.
- Use scripting (Python/Perl/Make) and revision control (git/svn) to automate flows.
- Support FPGA bring-up, hardware emulation/prototyping, and hardware integration tests.
- Collaborate with system and hardware teams to capture requirements and debug issues.
- Work statement is a non-managerial role, non-leadership role.
PREFERRED QUALIFICATIONS (DESIRED SKILLS/EXPERIENCE:
- 2+ years (Associate) or 5+ years (Experienced) verification experience.
- Experience with hardware emulators (e.g., Palladium) and FPGA prototyping.
- Knowledge of high-speed SerDes (PCIe, Ethernet, JESD204C).
- Experience with SVA (SystemVerilog Assertions) and RTL-to-GDS flows.
- Familiar with space/radiation mitigation techniques is a plus.
REQUIRED EDUCATION:
Minimum of a Bachelor of Science degree from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years' related work experience (e.g. PhD+4 years' related work experience, Master+7 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.WORK HOURS:
FULL TIME/FIRST SHIFT;8:00 AM - 5:00 PMEmployment will be contingent on clearing a drug screen and background check. Both must clear prior to start date.
- Contact
-
Terry Jones
tjones@chiptonross.com
CHIPTON-ROSS, INC.
420 Culver Boulevard
Playa Del Rey, CA 90293
Phone: (310) 414-7800 x282 or (800) 927-9318 x282
Candidates responding to this posting must currently possess the eligibility to work in the United States. No third parties please.
Employment will be contingent on candidate clearing pre-employment drug screen and background check.
Chipton-Ross provides equal employment opportunities to all employees and applicants for employment without regard to race, color, creed, religion, national origin, sex (including pregnancy), age, disability, sexual orientation, gender identity and/or expression, protected veteran status, genetic information, or any other characteristic protected by Federal, State or local law. This policy governs all areas of employment at Chipton-Ross, including recruiting, hiring, training, assignment, promotions, compensation, benefits, discipline, and terminations.