- 187216 - Sr Electrical Engineer FPGA ASIC Designer
- Up to $78.59 DOE
- 3 Months
Chipton-Ross is seeking a Sr. Electrical Engineer FPGA ASIC Designer for an opening in Camden, NJ
Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) Design Engineer will be part of the core design team, responsible for the architecture, implementation, verification/validation through Software integration test, for delivery of complex FPGAs AND/OR ASICs systems.
S/he will develop architectures for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL, HLS) with high speed protocols– NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx MPSOC) AND/OR ASICs.
Additionally S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and also writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.
We have deployed state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family, VIPs for UVM, Clock Domain Crossing (CDC), Catapult (HLS).
This is a key, high impact, high visibility role in the organization to ensure robust quality and delivery of Communication products for National Security.
• At least 5 year experience with proven track record of implementing complex algorithms in networking ASIC/FPGAs
• Proficiency in VHDL, C++ (OOP) and System Verilog Assertions (SVA)
• Experience with debugging in ARM ecosystem with Linux OS
• Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet)
• Excellent Analytical/Debug skills
• Good verbal, written, and presentation skills
• High Level Synthesis (HLS) with Vivado, Mentor Catapult
• Xilinx MPSOC, and Vivado SDK and Linux super user
• Cryptographic and high speed networking designs
Accredited Bachelor of Science in Electrical Engineering or Computer Science or equivalent. Master of Science in Electrical Engineering or Computer Science preferred
MISCELLANEOUS: Applicants responding to this position will be subject to a government security investigation and must meet eligibility requirements by currently possessing the ability to view classified government information.
Employment will be contingent on clearing a drug screen and background check. Both must clear prior to start date.
420 Culver Boulevard
Playa Del Rey, CA 90293
Phone: (310) 414-7800 x250 or (800) 927-9318 x250
Candidates responding to this posting must currently possess the eligibility to work in the United States. No third parties please.
Employment will be contingent on candidate clearing pre-employment drug screen and background check.
Chipton-Ross provides equal employment opportunities to all employees and applicants for employment without regard to race, color, creed, religion, national origin, sex (including pregnancy), age, disability, sexual orientation, gender identity and/or expression, protected veteran status, genetic information, or any other characteristic protected by Federal, State or local law. This policy governs all areas of employment at Chipton-Ross, including recruiting, hiring, training, assignment, promotions, compensation, benefits, discipline, and terminations.